/**************************************************************
 * Copyright (C) 2010   STMicroelectronics. All Rights Reserved.
 * This file is part of the latest release of the Multicom4 project. This release 
 * is fully functional and provides all of the original MME functionality.This 
 * release  is now considered stable and ready for integration with other software 
 * components.

 * Multicom4 is a free software; you can redistribute it and/or modify it under the 
 * terms of the GNU General Public License as published by the Free Software Foundation 
 * version 2.

 * Multicom4 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; 
 * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
 * See the GNU General Public License for more details.

 * You should have received a copy of the GNU General Public License along with Multicom4; 
 * see the file COPYING.  If not, write to the Free Software Foundation, 59 Temple Place - 
 * Suite 330, Boston, MA 02111-1307, USA.

 * Written by Multicom team at STMicroelectronics in November 2010.  
 * Contact multicom.support@st.com. 
**************************************************************/

/*
 */

#ifndef __STX7108REG_H
#define __STX7108REG_H

#include "sh4regtype.h"

/*----------------------------------------------------------------------------*/

/*
 * Base addresses for control register banks.
 */

/* Generic SH4 control registers */
#ifndef SH4_TMU_REGS_BASE
#define SH4_TMU_REGS_BASE 0xffd80000
#endif

/* Common ST40 control registers */
#ifndef ST40_CPG_REGS_BASE
#define ST40_CPG_REGS_BASE 0xffc00000
#endif
#ifndef ST40_INTC_REGS_BASE
#define ST40_INTC_REGS_BASE 0xffd00000
#endif
#ifndef ST40_SCIF2_REGS_BASE
#define ST40_SCIF2_REGS_BASE 0xffe80000
#endif

#ifndef STX7108_COMMS_BASE
#define STX7108_COMMS_BASE 0xfd700000
#endif

#ifndef ST40_ILC_REGS_BASE
#define ST40_ILC_REGS_BASE STX7108_COMMS_BASE
#endif

/* The STi7108 also has a bank of stand-alone bank of PIOs */
#ifndef STX7108_10_14_PIO_REGS_BASE
#define STX7108_10_14_PIO_REGS_BASE 0xFDA60000
#endif

#ifndef STX7108_15_24_PIO_REGS_BASE
#define STX7108_15_24_PIO_REGS_BASE 0xFE740000
#endif

#ifndef STX7108_25_26_PIO_REGS_BASE
#define STX7108_25_26_PIO_REGS_BASE 0xFE720000
#endif

/* STi7108 control registers */
#ifndef STX7108_SYSCONF0_REGS_BASE
#define STX7108_SYSCONF0_REGS_BASE 0xFDE30000
#endif

#ifndef STX7108_SYSCONF1_REGS_BASE
#define STX7108_SYSCONF1_REGS_BASE 0xFDE20000
#endif

#ifndef STX7108_SYSCONF2_REGS_BASE
#define STX7108_SYSCONF2_REGS_BASE 0xFDA50000
#endif

#ifndef STX7108_SYSCONF3_REGS_BASE
#define STX7108_SYSCONF3_REGS_BASE 0xFD500000
#endif

#ifndef STX7108_SYSCONF4_REGS_BASE
#define STX7108_SYSCONF4_REGS_BASE 0xFE700000
#endif

#ifndef STX7108_CLOCKGENA0_REGS_BASE
#define STX7108_CLOCKGENA0_REGS_BASE 0xfde98000
#endif

#ifndef STX7108_CLOCKGENA1_REGS_BASE
#define STX7108_CLOCKGENA1_REGS_BASE 0xfdab8000
#endif

#ifndef STX7108_CLOCKGENB_REGS_BASE
#define STX7108_CLOCKGENB_REGS_BASE 0xfd546000
#endif

/* System Architecture Volume 2: Bus Interfaces */
#ifndef ST40_LMI0_REGS_BASE
#define ST40_LMI0_REGS_BASE 0xfde50000
#endif
#ifndef ST40_LMI1_REGS_BASE
#define ST40_LMI1_REGS_BASE 0xfde70000
#endif
#ifndef ST40_EMI_REGS_BASE
#define ST40_EMI_REGS_BASE 0xfe900000
#endif


#ifndef ST40_PIO0_REGS_BASE
#define ST40_PIO0_REGS_BASE (STX7108_COMMS_BASE + 0x00020000)
#endif
#ifndef ST40_PIO1_REGS_BASE
#define ST40_PIO1_REGS_BASE (STX7108_COMMS_BASE + 0x00021000)
#endif
#ifndef ST40_PIO2_REGS_BASE
#define ST40_PIO2_REGS_BASE (STX7108_COMMS_BASE + 0x00022000)
#endif
#ifndef ST40_PIO3_REGS_BASE
#define ST40_PIO3_REGS_BASE (STX7108_COMMS_BASE + 0x00023000)
#endif
#ifndef ST40_PIO4_REGS_BASE
#define ST40_PIO4_REGS_BASE (STX7108_COMMS_BASE + 0x00024000)
#endif
#ifndef ST40_PIO5_REGS_BASE
#define ST40_PIO5_REGS_BASE (STX7108_COMMS_BASE + 0x00025000)
#endif
#ifndef ST40_PIO6_REGS_BASE
#define ST40_PIO6_REGS_BASE (STX7108_COMMS_BASE + 0x00026000)
#endif
#ifndef ST40_PIO7_REGS_BASE
#define ST40_PIO7_REGS_BASE (STX7108_COMMS_BASE + 0x00027000)
#endif
#ifndef ST40_PIO8_REGS_BASE
#define ST40_PIO8_REGS_BASE (STX7108_COMMS_BASE + 0x00028000)
#endif
#ifndef ST40_PIO9_REGS_BASE
#define ST40_PIO9_REGS_BASE (STX7108_COMMS_BASE + 0x00029000)
#endif
#ifndef ST40_PIO10_REGS_BASE
#define ST40_PIO10_REGS_BASE (STX7108_10_14_PIO_REGS_BASE + 0x00000000)
#endif
#ifndef ST40_PIO11_REGS_BASE
#define ST40_PIO11_REGS_BASE (STX7108_10_14_PIO_REGS_BASE + 0x00001000)
#endif
#ifndef ST40_PIO12_REGS_BASE
#define ST40_PIO12_REGS_BASE (STX7108_10_14_PIO_REGS_BASE + 0x00002000)
#endif
#ifndef ST40_PIO13_REGS_BASE
#define ST40_PIO13_REGS_BASE (STX7108_10_14_PIO_REGS_BASE + 0x00003000)
#endif
#ifndef ST40_PIO14_REGS_BASE
#define ST40_PIO14_REGS_BASE (STX7108_10_14_PIO_REGS_BASE + 0x00004000)
#endif
#ifndef ST40_PIO15_REGS_BASE
#define ST40_PIO15_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00000000)
#endif
#ifndef ST40_PIO16_REGS_BASE
#define ST40_PIO16_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00001000)
#endif
#ifndef ST40_PIO17_REGS_BASE
#define ST40_PIO17_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00002000)
#endif
#ifndef ST40_PIO18_REGS_BASE
#define ST40_PIO18_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00003000)
#endif
#ifndef ST40_PIO19_REGS_BASE
#define ST40_PIO19_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00004000)
#endif
#ifndef ST40_PIO20_REGS_BASE
#define ST40_PIO20_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00005000)
#endif
#ifndef ST40_PIO21_REGS_BASE
#define ST40_PIO21_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00006000)
#endif
#ifndef ST40_PIO22_REGS_BASE
#define ST40_PIO22_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00007000)
#endif
#ifndef ST40_PIO23_REGS_BASE
#define ST40_PIO23_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00008000)
#endif
#ifndef ST40_PIO24_REGS_BASE
#define ST40_PIO24_REGS_BASE (STX7108_15_24_PIO_REGS_BASE + 0x00009000)
#endif
#ifndef ST40_PIO25_REGS_BASE
#define ST40_PIO25_REGS_BASE (STX7108_25_26_PIO_REGS_BASE + 0x00000000)
#endif
#ifndef ST40_PIO26_REGS_BASE
#define ST40_PIO26_REGS_BASE (STX7108_25_26_PIO_REGS_BASE + 0x00001000)
#endif

#ifndef ST40_ASC0_REGS_BASE
#define ST40_ASC0_REGS_BASE (STX7108_COMMS_BASE + 0x00030000)
#endif
#ifndef ST40_ASC1_REGS_BASE
#define ST40_ASC1_REGS_BASE (STX7108_COMMS_BASE + 0x00031000)
#endif
#ifndef ST40_ASC2_REGS_BASE
#define ST40_ASC2_REGS_BASE (STX7108_COMMS_BASE + 0x00032000)
#endif
#ifndef ST40_ASC3_REGS_BASE
#define ST40_ASC3_REGS_BASE (STX7108_COMMS_BASE + 0x00033000)
#endif

#ifndef ST40_SSC0_REGS_BASE
#define ST40_SSC0_REGS_BASE (STX7108_COMMS_BASE + 0x00040000)
#endif
#ifndef ST40_SSC1_REGS_BASE
#define ST40_SSC1_REGS_BASE (STX7108_COMMS_BASE + 0x00041000)
#endif
#ifndef ST40_SSC2_REGS_BASE
#define ST40_SSC2_REGS_BASE (STX7108_COMMS_BASE + 0x00042000)
#endif
#ifndef ST40_SSC3_REGS_BASE
#define ST40_SSC3_REGS_BASE (STX7108_COMMS_BASE + 0x00043000)
#endif
#ifndef ST40_SSC4_REGS_BASE
#define ST40_SSC4_REGS_BASE (STX7108_COMMS_BASE + 0x00044000)
#endif
#ifndef ST40_SSC5_REGS_BASE
#define ST40_SSC5_REGS_BASE (STX7108_COMMS_BASE + 0x00045000)
#endif
#ifndef ST40_SSC6_REGS_BASE
#define ST40_SSC6_REGS_BASE (STX7108_COMMS_BASE + 0x00046000)
#endif

#ifndef ST40_MAILBOX0_REGS_BASE
#define ST40_MAILBOX0_REGS_BASE 0xfe211000
#endif
#ifndef ST40_MAILBOX1_REGS_BASE
#define ST40_MAILBOX1_REGS_BASE (ST40_MAILBOX0_REGS_BASE + 0x1000)
#endif

/*----------------------------------------------------------------------------*/

#include "st40reg.h"

/*
 * STi7108 control registers
 */

/* Clock Generator A0 control registers (STi7108 variant) */
#define STX7108_CLOCKGENA0_PLL0_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x00)
#define STX7108_CLOCKGENA0_PLL1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x04)
#define STX7108_CLOCKGENA0_POWER_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x10)
#define STX7108_CLOCKGENA0_CLKOPSRC_SWITCH_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x14)
#define STX7108_CLOCKGENA0_OSC_ENABLE_FB SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x18)
#define STX7108_CLOCKGENA0_PLL0_ENABLE_FB SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x1c)
#define STX7108_CLOCKGENA0_PLL1_ENABLE_FB SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x20)
#define STX7108_CLOCKGENA0_CLKOPSRC_SWITCH_CFG2 SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x24)
#define STX7108_CLOCKGENA0_CLKOBS_MUX1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x30)
#define STX7108_CLOCKGENA0_CLKOBS_MASTER_MAXCOUNT SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x34)
#define STX7108_CLOCKGENA0_CLKOBS_CMD SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x38)
#define STX7108_CLOCKGENA0_CLKOBS_STATUS SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x3c)
#define STX7108_CLOCKGENA0_CLKOBS_SLAVE0_COUNT SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x40)
#define STX7108_CLOCKGENA0_CLKOBS_OSCMUX_DEBUG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x44)
#define STX7108_CLOCKGENA0_CLKOBS_MUX2_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x48)        
#define STX7108_CLOCKGENA0_LOW_POWER_CTRL SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x4c)
#define STX7108_CLOCKGENA0_OSC_DIV0_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x800)
#define STX7108_CLOCKGENA0_OSC_DIV1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x804)
#define STX7108_CLOCKGENA0_OSC_DIV2_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x808)
#define STX7108_CLOCKGENA0_OSC_DIV3_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x80c)
#define STX7108_CLOCKGENA0_OSC_DIV4_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x810)
#define STX7108_CLOCKGENA0_OSC_DIV5_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x814)
#define STX7108_CLOCKGENA0_OSC_DIV6_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x818)
#define STX7108_CLOCKGENA0_OSC_DIV7_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x81c)
#define STX7108_CLOCKGENA0_OSC_DIV8_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x820)
#define STX7108_CLOCKGENA0_OSC_DIV9_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x824)
#define STX7108_CLOCKGENA0_OSC_DIV10_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x828)
#define STX7108_CLOCKGENA0_OSC_DIV11_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x82c)
#define STX7108_CLOCKGENA0_OSC_DIV12_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x830)
#define STX7108_CLOCKGENA0_OSC_DIV13_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x834)
#define STX7108_CLOCKGENA0_OSC_DIV14_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x838)
#define STX7108_CLOCKGENA0_OSC_DIV15_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x83c)
#define STX7108_CLOCKGENA0_OSC_DIV16_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x840)
#define STX7108_CLOCKGENA0_OSC_DIV17_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x844)       
#define STX7108_CLOCKGENA0_PLL0HS_DIV0_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x900)
#define STX7108_CLOCKGENA0_PLL0HS_DIV1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x904)
#define STX7108_CLOCKGENA0_PLL0HS_DIV2_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x908)
#define STX7108_CLOCKGENA0_PLL0HS_DIV3_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0x90c)        
#define STX7108_CLOCKGENA0_PLL0LS_DIV4_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa10)
#define STX7108_CLOCKGENA0_PLL0LS_DIV5_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa14)
#define STX7108_CLOCKGENA0_PLL0LS_DIV6_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa18)
#define STX7108_CLOCKGENA0_PLL0LS_DIV7_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa1c)
#define STX7108_CLOCKGENA0_PLL0LS_DIV8_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa20)
#define STX7108_CLOCKGENA0_PLL0LS_DIV9_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa24)
#define STX7108_CLOCKGENA0_PLL0LS_DIV10_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa28)
#define STX7108_CLOCKGENA0_PLL0LS_DIV11_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa2c)
#define STX7108_CLOCKGENA0_PLL0LS_DIV12_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa30)
#define STX7108_CLOCKGENA0_PLL0LS_DIV13_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa34)
#define STX7108_CLOCKGENA0_PLL0LS_DIV14_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa38)
#define STX7108_CLOCKGENA0_PLL0LS_DIV15_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa3c)
#define STX7108_CLOCKGENA0_PLL0LS_DIV16_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa40)
#define STX7108_CLOCKGENA0_PLL0LS_DIV17_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xa44)
#define STX7108_CLOCKGENA0_PLL1_DIV0_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb00)
#define STX7108_CLOCKGENA0_PLL1_DIV1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb04)
#define STX7108_CLOCKGENA0_PLL1_DIV2_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb08)
#define STX7108_CLOCKGENA0_PLL1_DIV3_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb0c)
#define STX7108_CLOCKGENA0_PLL1_DIV4_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb10)
#define STX7108_CLOCKGENA0_PLL1_DIV5_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb14)
#define STX7108_CLOCKGENA0_PLL1_DIV6_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb18)
#define STX7108_CLOCKGENA0_PLL1_DIV7_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb1c)
#define STX7108_CLOCKGENA0_PLL1_DIV8_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb20)
#define STX7108_CLOCKGENA0_PLL1_DIV9_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb24)
#define STX7108_CLOCKGENA0_PLL1_DIV10_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb28)
#define STX7108_CLOCKGENA0_PLL1_DIV11_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb2c)
#define STX7108_CLOCKGENA0_PLL1_DIV12_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb30)
#define STX7108_CLOCKGENA0_PLL1_DIV13_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb34)
#define STX7108_CLOCKGENA0_PLL1_DIV14_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb38)
#define STX7108_CLOCKGENA0_PLL1_DIV15_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb3c)
#define STX7108_CLOCKGENA0_PLL1_DIV16_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb40)
#define STX7108_CLOCKGENA0_PLL1_DIV17_CFG SH4_DWORD_REG(STX7108_CLOCKGENA0_REGS_BASE + 0xb44)

/* Clock Generator A0 control registers (STi7108 variant) */
#define STX7108_CLOCKGENA1_PLL0_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x00)
#define STX7108_CLOCKGENA1_PLL1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x04)
#define STX7108_CLOCKGENA1_POWER_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x10)
#define STX7108_CLOCKGENA1_CLKOPSRC_SWITCH_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x14)
#define STX7108_CLOCKGENA1_OSC_ENABLE_FB SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x18)
#define STX7108_CLOCKGENA1_PLL0_ENABLE_FB SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x1c)
#define STX7108_CLOCKGENA1_PLL1_ENABLE_FB SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x20)
#define STX7108_CLOCKGENA1_CLKOPSRC_SWITCH_CFG2 SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x24)
#define STX7108_CLOCKGENA1_CLKOBS_MUX1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x30)
#define STX7108_CLOCKGENA1_CLKOBS_MASTER_MAXCOUNT SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x34)
#define STX7108_CLOCKGENA1_CLKOBS_CMD SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x38)
#define STX7108_CLOCKGENA1_CLKOBS_STATUS SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x3c)
#define STX7108_CLOCKGENA1_CLKOBS_SLAVE0_COUNT SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x40)
#define STX7108_CLOCKGENA1_CLKOBS_OSCMUX_DEBUG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x44)
#define STX7108_CLOCKGENA1_CLKOBS_MUX2_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x48)        
#define STX7108_CLOCKGENA1_LOW_POWER_CTRL SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x4c)
#define STX7108_CLOCKGENA1_OSC_DIV0_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x800)
#define STX7108_CLOCKGENA1_OSC_DIV1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x804)
#define STX7108_CLOCKGENA1_OSC_DIV2_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x808)
#define STX7108_CLOCKGENA1_OSC_DIV3_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x80c)
#define STX7108_CLOCKGENA1_OSC_DIV4_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x810)
#define STX7108_CLOCKGENA1_OSC_DIV5_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x814)
#define STX7108_CLOCKGENA1_OSC_DIV6_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x818)
#define STX7108_CLOCKGENA1_OSC_DIV7_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x81c)
#define STX7108_CLOCKGENA1_OSC_DIV8_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x820)
#define STX7108_CLOCKGENA1_OSC_DIV9_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x824)
#define STX7108_CLOCKGENA1_OSC_DIV10_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x828)
#define STX7108_CLOCKGENA1_OSC_DIV11_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x82c)
#define STX7108_CLOCKGENA1_OSC_DIV12_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x830)
#define STX7108_CLOCKGENA1_OSC_DIV13_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x834)
#define STX7108_CLOCKGENA1_OSC_DIV14_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x838)
#define STX7108_CLOCKGENA1_OSC_DIV15_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x83c)
#define STX7108_CLOCKGENA1_OSC_DIV16_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x840)
#define STX7108_CLOCKGENA1_OSC_DIV17_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x844)       
#define STX7108_CLOCKGENA1_PLL0HS_DIV0_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x900)
#define STX7108_CLOCKGENA1_PLL0HS_DIV1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x904)
#define STX7108_CLOCKGENA1_PLL0HS_DIV2_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x908)
#define STX7108_CLOCKGENA1_PLL0HS_DIV3_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0x90c)        
#define STX7108_CLOCKGENA1_PLL0LS_DIV4_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa10)
#define STX7108_CLOCKGENA1_PLL0LS_DIV5_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa14)
#define STX7108_CLOCKGENA1_PLL0LS_DIV6_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa18)
#define STX7108_CLOCKGENA1_PLL0LS_DIV7_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa1c)
#define STX7108_CLOCKGENA1_PLL0LS_DIV8_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa20)
#define STX7108_CLOCKGENA1_PLL0LS_DIV9_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa24)
#define STX7108_CLOCKGENA1_PLL0LS_DIV10_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa28)
#define STX7108_CLOCKGENA1_PLL0LS_DIV11_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa2c)
#define STX7108_CLOCKGENA1_PLL0LS_DIV12_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa30)
#define STX7108_CLOCKGENA1_PLL0LS_DIV13_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa34)
#define STX7108_CLOCKGENA1_PLL0LS_DIV14_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa38)
#define STX7108_CLOCKGENA1_PLL0LS_DIV15_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa3c)
#define STX7108_CLOCKGENA1_PLL0LS_DIV16_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa40)
#define STX7108_CLOCKGENA1_PLL0LS_DIV17_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xa44)
#define STX7108_CLOCKGENA1_PLL1_DIV0_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb00)
#define STX7108_CLOCKGENA1_PLL1_DIV1_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb04)
#define STX7108_CLOCKGENA1_PLL1_DIV2_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb08)
#define STX7108_CLOCKGENA1_PLL1_DIV3_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb0c)
#define STX7108_CLOCKGENA1_PLL1_DIV4_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb10)
#define STX7108_CLOCKGENA1_PLL1_DIV5_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb14)
#define STX7108_CLOCKGENA1_PLL1_DIV6_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb18)
#define STX7108_CLOCKGENA1_PLL1_DIV7_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb1c)
#define STX7108_CLOCKGENA1_PLL1_DIV8_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb20)
#define STX7108_CLOCKGENA1_PLL1_DIV9_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb24)
#define STX7108_CLOCKGENA1_PLL1_DIV10_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb28)
#define STX7108_CLOCKGENA1_PLL1_DIV11_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb2c)
#define STX7108_CLOCKGENA1_PLL1_DIV12_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb30)
#define STX7108_CLOCKGENA1_PLL1_DIV13_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb34)
#define STX7108_CLOCKGENA1_PLL1_DIV14_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb38)
#define STX7108_CLOCKGENA1_PLL1_DIV15_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb3c)
#define STX7108_CLOCKGENA1_PLL1_DIV16_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb40)
#define STX7108_CLOCKGENA1_PLL1_DIV17_CFG SH4_DWORD_REG(STX7108_CLOCKGENA1_REGS_BASE + 0xb44)

#define STX7108_CLOCKGENB_LOCK SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x10) 
#define STX7108_CLOCKGENB_FS0_CTRL SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x14) 
#define STX7108_CLOCKGENB_FS0_MD1 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x18) 
#define STX7108_CLOCKGENB_FS0_PE1 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x1c) 
#define STX7108_CLOCKGENB_FS0_EN_PRG1 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x20) 
#define STX7108_CLOCKGENB_FS0_SDIV1 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x24) 
#define STX7108_CLOCKGENB_FS0_MD2 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x28) 
#define STX7108_CLOCKGENB_FS0_PE2 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x2c) 
#define STX7108_CLOCKGENB_FS0_EN_PRG2 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x30) 
#define STX7108_CLOCKGENB_FS0_SDIV2 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x34) 
#define STX7108_CLOCKGENB_FS0_MD3 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x38) 
#define STX7108_CLOCKGENB_FS0_PE3 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x3c) 
#define STX7108_CLOCKGENB_FS0_EN_PRG3 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x40) 
#define STX7108_CLOCKGENB_FS0_SDIV3 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x44) 
#define STX7108_CLOCKGENB_FS0_CLOCKOUT_CTRL SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x58) 
#define STX7108_CLOCKGENB_FS1_CTRL SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x5c) 
#define STX7108_CLOCKGENB_FS1_MD1 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x60) 
#define STX7108_CLOCKGENB_FS1_PE1 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x64) 
#define STX7108_CLOCKGENB_FS1_EN_PRG1 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x68) 
#define STX7108_CLOCKGENB_FS1_SDIV1 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x6c) 
#define STX7108_CLOCKGENB_FS1_MD2 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x70) 
#define STX7108_CLOCKGENB_FS1_PE2 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x74) 
#define STX7108_CLOCKGENB_FS1_EN_PRG2 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x78) 
#define STX7108_CLOCKGENB_FS1_SDIV2 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x7c) 
#define STX7108_CLOCKGENB_FS1_MD3 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x80) 
#define STX7108_CLOCKGENB_FS1_PE3 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x84) 
#define STX7108_CLOCKGENB_FS1_EN_PRG3 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x88) 
#define STX7108_CLOCKGENB_FS1_SDIV3 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x8c) 
#define STX7108_CLOCKGENB_FS1_MD4 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x90) 
#define STX7108_CLOCKGENB_FS1_PE4 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x94) 
#define STX7108_CLOCKGENB_FS1_EN_PRG4 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x98) 
#define STX7108_CLOCKGENB_FS1_SDIV4 SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0x9c) 
#define STX7108_CLOCKGENB_FS1_CLOCKOUT_CTRL SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0xa0) 
#define STX7108_CLOCKGENB_DISPLAY_CFG SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0xa4) 
#define STX7108_CLOCKGENB_FS_SELECT SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0xa8) 
#define STX7108_CLOCKGENB_POWER_DOWN SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0xac) 
#define STX7108_CLOCKGENB_POWER_ENABLE SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0xb0) 
#define STX7108_CLOCKGENB_OUT_CTRL SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0xb4) 
#define STX7108_CLOCKGENB_CRYSTAL_SEL SH4_DWORD_REG(STX7108_CLOCKGENB_REGS_BASE + 0xb8)

/* System configuration registers (STi7108 variant) */
#define STX7108_SYSCONF_DEVICEID_0 SH4_DWORD_REG(STX7108_SYSCONF_REGS_BASE + 0x0000)
#define STX7108_SYSCONF_DEVICEID_1 SH4_DWORD_REG(STX7108_SYSCONF_REGS_BASE + 0x0004)
#define STX7108_SYSCONF_DEVICEID SH4_GWORD_REG(STX7108_SYSCONF_REGS_BASE + 0x0000)

/* SYSCONF Bank 0 */
#define STX7108_SYSCONF0_SYS_STA00 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0000)
#define STX7108_SYSCONF0_SYS_CFG00 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0004)
#define STX7108_SYSCONF0_SYS_CFG01 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0008)
#define STX7108_SYSCONF0_SYS_CFG02 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x000C)
#define STX7108_SYSCONF0_SYS_CFG03 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0010)
#define STX7108_SYSCONF0_SYS_CFG04 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0014)
#define STX7108_SYSCONF0_SYS_CFG05 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0018)
#define STX7108_SYSCONF0_SYS_CFG06 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x001C)
#define STX7108_SYSCONF0_SYS_CFG07 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0020)
#define STX7108_SYSCONF0_SYS_CFG08 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0024)
#define STX7108_SYSCONF0_SYS_CFG12 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0028)
#define STX7108_SYSCONF0_SYS_CFG13 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x002C)
#define STX7108_SYSCONF0_SYS_CFG14 SH4_DWORD_REG(STX7108_SYSCONF0_REGS_BASE + 0x0030)

/* SYSCONF Bank 1 */
#define STX7108_SYSCONF1_SYS_STA00 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0000)
#define STX7108_SYSCONF1_SYS_STA01 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0004)
#define STX7108_SYSCONF1_SYS_STA02 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0008)
#define STX7108_SYSCONF1_SYS_STA03 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x000C)
#define STX7108_SYSCONF1_SYS_STA04 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0010)
#define STX7108_SYSCONF1_SYS_STA05 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0014)
#define STX7108_SYSCONF1_SYS_STA06 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0018)
#define STX7108_SYSCONF1_SYS_STA07 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x001C)
#define STX7108_SYSCONF1_SYS_STA08 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0020)
#define STX7108_SYSCONF1_SYS_STA09 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0024)
#define STX7108_SYSCONF1_SYS_STA10 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0028)
#define STX7108_SYSCONF1_SYS_STA11 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x002C)
#define STX7108_SYSCONF1_SYS_STA12 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0030)
#define STX7108_SYSCONF1_SYS_STA13 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0034)
#define STX7108_SYSCONF1_SYS_STA14 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0038)
#define STX7108_SYSCONF1_SYS_CFG00 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x003C)
#define STX7108_SYSCONF1_SYS_CFG01 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0040)
#define STX7108_SYSCONF1_SYS_CFG02 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0044)
#define STX7108_SYSCONF1_SYS_CFG03 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0048)
#define STX7108_SYSCONF1_SYS_CFG04 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x004C)
#define STX7108_SYSCONF1_SYS_CFG05 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0050)
#define STX7108_SYSCONF1_SYS_CFG06 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0054)
#define STX7108_SYSCONF1_SYS_CFG07 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0058)
#define STX7108_SYSCONF1_SYS_CFG08 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x005C)
#define STX7108_SYSCONF1_SYS_CFG09 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0060)
#define STX7108_SYSCONF1_SYS_CFG10 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0064)
#define STX7108_SYSCONF1_SYS_CFG11 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0068)
#define STX7108_SYSCONF1_SYS_CFG12 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x006C)
#define STX7108_SYSCONF1_SYS_CFG13 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0070)
#define STX7108_SYSCONF1_SYS_CFG14 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0074)
#define STX7108_SYSCONF1_SYS_CFG15 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0078)
#define STX7108_SYSCONF1_SYS_CFG16 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x007C)
#define STX7108_SYSCONF1_SYS_CFG17 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0080)
#define STX7108_SYSCONF1_SYS_CFG18 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0084)
#define STX7108_SYSCONF1_SYS_CFG19 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0088)
#define STX7108_SYSCONF1_SYS_CFG20 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x008C)
#define STX7108_SYSCONF1_SYS_CFG21 SH4_DWORD_REG(STX7108_SYSCONF1_REGS_BASE + 0x0090)

/* SYSCONF Bank 2 */
#define STX7108_SYSCONF2_SYS_CFG00 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0000)
#define STX7108_SYSCONF2_SYS_CFG01 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0004)
#define STX7108_SYSCONF2_SYS_CFG02 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0008)
#define STX7108_SYSCONF2_SYS_CFG03 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x000C)
#define STX7108_SYSCONF2_SYS_CFG04 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0010)
#define STX7108_SYSCONF2_SYS_CFG05 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0014)
#define STX7108_SYSCONF2_SYS_CFG06 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0018)
#define STX7108_SYSCONF2_SYS_CFG07 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x001C)
#define STX7108_SYSCONF2_SYS_CFG08 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0020)
#define STX7108_SYSCONF2_SYS_CFG09 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0024)
#define STX7108_SYSCONF2_SYS_CFG10 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0028)
#define STX7108_SYSCONF2_SYS_CFG11 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x002C)
#define STX7108_SYSCONF2_SYS_CFG12 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0030)
#define STX7108_SYSCONF2_SYS_CFG13 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0034)
#define STX7108_SYSCONF2_SYS_CFG14 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0038)
#define STX7108_SYSCONF2_SYS_CFG15 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x003C)
#define STX7108_SYSCONF2_SYS_CFG16 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0040)
#define STX7108_SYSCONF2_SYS_CFG17 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0044)
#define STX7108_SYSCONF2_SYS_CFG18 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0048)
#define STX7108_SYSCONF2_SYS_CFG19 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x004C)
#define STX7108_SYSCONF2_SYS_CFG20 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0050)
#define STX7108_SYSCONF2_SYS_CFG21 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0054)
#define STX7108_SYSCONF2_SYS_CFG22 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0058)
#define STX7108_SYSCONF2_SYS_CFG23 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x005c)
#define STX7108_SYSCONF2_SYS_CFG24 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0060)
#define STX7108_SYSCONF2_SYS_CFG25 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0064)
#define STX7108_SYSCONF2_SYS_CFG26 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0068)
#define STX7108_SYSCONF2_SYS_CFG27 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x006c)
#define STX7108_SYSCONF2_SYS_CFG28 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0070)
#define STX7108_SYSCONF2_SYS_CFG29 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0074)
#define STX7108_SYSCONF2_SYS_CFG30 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0078)
#define STX7108_SYSCONF2_SYS_CFG31 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x007c)
#define STX7108_SYSCONF2_SYS_CFG32 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0080)
#define STX7108_SYSCONF2_SYS_CFG33 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0084)
#define STX7108_SYSCONF2_SYS_CFG34 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0088)
#define STX7108_SYSCONF2_SYS_CFG35 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x008c)
#define STX7108_SYSCONF2_SYS_CFG36 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0090)
#define STX7108_SYSCONF2_SYS_CFG37 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0094)
#define STX7108_SYSCONF2_SYS_CFG38 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x0098)
#define STX7108_SYSCONF2_SYS_CFG39 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x009c)
#define STX7108_SYSCONF2_SYS_CFG40 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00a0)
#define STX7108_SYSCONF2_SYS_CFG41 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00a4)
#define STX7108_SYSCONF2_SYS_CFG42 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00a8)
#define STX7108_SYSCONF2_SYS_CFG43 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00ac)
#define STX7108_SYSCONF2_SYS_CFG44 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00b0)
#define STX7108_SYSCONF2_SYS_CFG45 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00b4)
#define STX7108_SYSCONF2_SYS_CFG46 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00b8)
#define STX7108_SYSCONF2_SYS_CFG47 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00bc)
#define STX7108_SYSCONF2_SYS_CFG48 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00c0)
#define STX7108_SYSCONF2_SYS_CFG49 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00c4)
#define STX7108_SYSCONF2_SYS_CFG50 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00c8)
#define STX7108_SYSCONF2_SYS_CFG51 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00cc)
#define STX7108_SYSCONF2_SYS_CFG52 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00d0)
#define STX7108_SYSCONF2_SYS_CFG53 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00d4)
#define STX7108_SYSCONF2_SYS_CFG54 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00d8)
#define STX7108_SYSCONF2_SYS_CFG55 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00dc)
#define STX7108_SYSCONF2_SYS_CFG56 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00E0)
#define STX7108_SYSCONF2_SYS_STA00 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00E4)
#define STX7108_SYSCONF2_SYS_STA01 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00E8)
#define STX7108_SYSCONF2_SYS_STA02 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00EC)
#define STX7108_SYSCONF2_SYS_STA03 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00F0)
#define STX7108_SYSCONF2_SYS_STA04 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00F4)
#define STX7108_SYSCONF2_SYS_STA05 SH4_DWORD_REG(STX7108_SYSCONF2_REGS_BASE + 0x00F8)

/* SYSCONF Bank 3 */
#define STX7108_SYSCONF3_SYS_STA00 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0000)
#define STX7108_SYSCONF3_SYS_STA01 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0004)
#define STX7108_SYSCONF3_SYS_STA02 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0008)
#define STX7108_SYSCONF3_SYS_STA03 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x000C)
#define STX7108_SYSCONF3_SYS_STA04 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0010)
#define STX7108_SYSCONF3_SYS_STA05 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0014)
#define STX7108_SYSCONF3_SYS_CFG00 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0018)
#define STX7108_SYSCONF3_SYS_CFG01 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x001C)
#define STX7108_SYSCONF3_SYS_CFG02 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0020)
#define STX7108_SYSCONF3_SYS_CFG03 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0024)
#define STX7108_SYSCONF3_SYS_CFG04 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0028)
#define STX7108_SYSCONF3_SYS_CFG05 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x002C)
#define STX7108_SYSCONF3_SYS_CFG06 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0030)
#define STX7108_SYSCONF3_SYS_CFG07 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0034)
#define STX7108_SYSCONF3_SYS_CFG08 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x0038)
#define STX7108_SYSCONF3_SYS_CFG09 SH4_DWORD_REG(STX7108_SYSCONF3_REGS_BASE + 0x003C)

/* SYSCONF Bank 4 */
#define STX7108_SYSCONF4_SYS_CFG00 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0000)
#define STX7108_SYSCONF4_SYS_CFG01 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0004)
#define STX7108_SYSCONF4_SYS_CFG02 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0008)
#define STX7108_SYSCONF4_SYS_CFG03 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x000C)
#define STX7108_SYSCONF4_SYS_CFG04 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0010)
#define STX7108_SYSCONF4_SYS_CFG05 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0014)
#define STX7108_SYSCONF4_SYS_CFG06 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0018)
#define STX7108_SYSCONF4_SYS_CFG07 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x001C)
#define STX7108_SYSCONF4_SYS_CFG08 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0020)
#define STX7108_SYSCONF4_SYS_CFG09 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0024)
#define STX7108_SYSCONF4_SYS_CFG10 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0028)
#define STX7108_SYSCONF4_SYS_CFG11 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x002C)
#define STX7108_SYSCONF4_SYS_CFG12 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0030)
#define STX7108_SYSCONF4_SYS_CFG13 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0034)
#define STX7108_SYSCONF4_SYS_CFG14 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0038)
#define STX7108_SYSCONF4_SYS_CFG15 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x003C)
#define STX7108_SYSCONF4_SYS_CFG16 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0040)
#define STX7108_SYSCONF4_SYS_CFG17 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0044)
#define STX7108_SYSCONF4_SYS_CFG18 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0048)
#define STX7108_SYSCONF4_SYS_CFG19 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x004C)
#define STX7108_SYSCONF4_SYS_CFG20 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0050)
#define STX7108_SYSCONF4_SYS_CFG21 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0054)
#define STX7108_SYSCONF4_SYS_CFG22 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0058)
#define STX7108_SYSCONF4_SYS_CFG23 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x005c)
#define STX7108_SYSCONF4_SYS_CFG24 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0060)
#define STX7108_SYSCONF4_SYS_CFG25 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0064)
#define STX7108_SYSCONF4_SYS_CFG26 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0068)
#define STX7108_SYSCONF4_SYS_CFG27 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x006c)
#define STX7108_SYSCONF4_SYS_CFG28 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0070)
#define STX7108_SYSCONF4_SYS_CFG29 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0074)
#define STX7108_SYSCONF4_SYS_CFG30 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0078)
#define STX7108_SYSCONF4_SYS_CFG31 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x007c)
#define STX7108_SYSCONF4_SYS_CFG32 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0080)
#define STX7108_SYSCONF4_SYS_CFG33 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0084)
#define STX7108_SYSCONF4_SYS_CFG34 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0088)
#define STX7108_SYSCONF4_SYS_CFG35 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x008c)
#define STX7108_SYSCONF4_SYS_CFG36 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0090)
#define STX7108_SYSCONF4_SYS_CFG37 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0094)
#define STX7108_SYSCONF4_SYS_CFG38 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0098)
#define STX7108_SYSCONF4_SYS_CFG39 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x009c)
#define STX7108_SYSCONF4_SYS_CFG40 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00a0)
#define STX7108_SYSCONF4_SYS_CFG41 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00a4)
#define STX7108_SYSCONF4_SYS_CFG42 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00a8)
#define STX7108_SYSCONF4_SYS_CFG43 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00ac)
#define STX7108_SYSCONF4_SYS_CFG44 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00b0)
#define STX7108_SYSCONF4_SYS_CFG45 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00b4)
#define STX7108_SYSCONF4_SYS_CFG46 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00b8)
#define STX7108_SYSCONF4_SYS_CFG47 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00bc)
#define STX7108_SYSCONF4_SYS_CFG48 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00c0)
#define STX7108_SYSCONF4_SYS_CFG49 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00c4)
#define STX7108_SYSCONF4_SYS_CFG50 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00c8)
#define STX7108_SYSCONF4_SYS_CFG51 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00cc)
#define STX7108_SYSCONF4_SYS_CFG52 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00d0)
#define STX7108_SYSCONF4_SYS_CFG53 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00d4)
#define STX7108_SYSCONF4_SYS_CFG54 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00d8)
#define STX7108_SYSCONF4_SYS_CFG55 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00dc)
#define STX7108_SYSCONF4_SYS_CFG56 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00E0)
#define STX7108_SYSCONF4_SYS_CFG57 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00E4)
#define STX7108_SYSCONF4_SYS_CFG58 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00E8)
#define STX7108_SYSCONF4_SYS_CFG59 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00Ec)
#define STX7108_SYSCONF4_SYS_CFG60 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00F0)
#define STX7108_SYSCONF4_SYS_CFG61 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00F4)
#define STX7108_SYSCONF4_SYS_CFG62 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00F8)
#define STX7108_SYSCONF4_SYS_CFG63 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x00FC)
#define STX7108_SYSCONF4_SYS_CFG64 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0100)
#define STX7108_SYSCONF4_SYS_CFG65 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0104)
#define STX7108_SYSCONF4_SYS_CFG66 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0108)
#define STX7108_SYSCONF4_SYS_CFG67 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x010c)
#define STX7108_SYSCONF4_SYS_CFG68 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0110)
#define STX7108_SYSCONF4_SYS_CFG69 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0114)
#define STX7108_SYSCONF4_SYS_CFG70 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0118)
#define STX7108_SYSCONF4_SYS_STA00 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x011C)
#define STX7108_SYSCONF4_SYS_STA01 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0120)
#define STX7108_SYSCONF4_SYS_STA02 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0124)
#define STX7108_SYSCONF4_SYS_STA03 SH4_DWORD_REG(STX7108_SYSCONF4_REGS_BASE + 0x0128)

#endif /* __STX7108REG_H */
